Phase-locked loop circuit

Oscillators – Automatic frequency stabilization using a phase or frequency... – Tuning compensation

Reexamination Certificate

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Details

C331S017000, C331S025000, C331S034000, C331S044000, C331S176000, C327S157000

Reexamination Certificate

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11269742

ABSTRACT:
The phase-locked loop circuit includes a gain setting circuit for setting a gain of a voltage controlled oscillator, and a time-constant setting circuit for setting a time constant, which is determined by the amount of current in a charge pump circuit and a capacitance value of a loop filter. The gain setting circuit sets the gain to a predetermined value, and the time-constant setting circuit sets the time constant to a predetermined value, whereby the loop band width of the phase-locked loop circuit is set to a desired value.

REFERENCES:
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patent: 4595886 (1986-06-01), Mroch et al.
patent: 5389899 (1995-02-01), Yahagi et al.
patent: 6023185 (2000-02-01), Galipeau et al.
patent: 6466100 (2002-10-01), Mullgrav, Jr. et al.
patent: 6552618 (2003-04-01), Nelson et al.
patent: 6686804 (2004-02-01), Adams et al.
Michael H. Perrott, et al., “A Modeling Approach for Σ- Δ Fractional-NFrequency Synthesizers Allowing Straightforward Noise Analysis,” IEEE Journal of Solid-State Circuits, Aug. 2002, pp. 1028-1038, vol. 37, No. 8, IEEE.

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