Phase-locked loop circuit

Oscillators – Automatic frequency stabilization using a phase or frequency... – Particular error voltage control

Reexamination Certificate

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C331S00100A

Reexamination Certificate

active

07148759

ABSTRACT:
A PLL circuit comprising a loop filter with at least a first and a second bandwith is provided. The first bandwith of the loop filter is determined by a first network of circuit components and used out of the linear range of the PLL circuit and the second bandwith is determined by a second network of circuit components and used within the linear range of the PLL circuit. A node of said second network is charged to a voltage level given by a node of said first network while the second network is switched off. When the second network is switched in, no long lasting charging process is required. Therefore, the lock time of the PLL circuit is reduced.

REFERENCES:
patent: 5175729 (1992-12-01), Borras et al.
patent: 5461344 (1995-10-01), Andoh
patent: 6356158 (2002-03-01), Lesea
patent: 6389092 (2002-05-01), Momtaz
patent: 6476681 (2002-11-01), Kirkpatrick

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