Phase locked loop circuit

Details Phase locked loop circuit Phase locked loop circuit

1977-02-15

1978-01-10

Kominski, John

Oscillators

Automatic frequency stabilization using a phase or frequency...

Transistorized controls

331 16, 331113R, 331177R, H03B 304

Patent

active

040681882

ABSTRACT:
Phase locked loop (PLL) circuit comprises, a phase detector including first and second cascade-connected differential pairs of transistors constituting an analog multiplier with each one of the differential pair transistors supplied with two inputs, a low pass filter for converting the detection output into a D.C. control voltage, and an emitter-coupled multivibrator including constant current sources for determining the oscillation frequency with a timing capacitor. The PLL circuit is provided with constant current adjusting means for variably setting or determining the current through a constant current source connected to the second differential pair of transistors and the currents through the current sources determining the oscillation frequency in a correlated manner through a common variable resistor. Thereby, dispersions in the loop gain of the PLL circuit are reduced.

REFERENCES:
patent: 3821658 (1974-06-01), Hoeft
patent: 3857110 (1974-12-01), Grebene
patent: 3869679 (1975-03-01), Grebene
patent: 3870971 (1975-03-01), Takahashi et al.
patent: 3946330 (1976-03-01), Takahashi

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