Phase locked loop calibration

Telecommunications – Receiver or analog modulated signal frequency converter – Signal selection based on frequency

Reexamination Certificate

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Details

C455S260000, C455S226100, C455S067110, C455S076000

Reexamination Certificate

active

07095992

ABSTRACT:
A method for calibrating a phase locked loop (PLL) includes an open loop test and a closed loop test. The open loop test includes providing an optimal control input to a controlled oscillator (CO) of the PLL; determining rate of output oscillation of the CO based on the optimal control input; comparing the rate of the output oscillation with rate of an optimal output oscillation; and when the comparing the rate of the output oscillation with rate of the optimal output oscillation is unfavorable, adjusting an oscillation point of the CO until the comparing is favorable to produce an open-loop adjusted CO oscillation point. The close loop test includes determining a closed-loop input control level of the CO at the open-loop adjusted CO oscillation point; comparing the closed-loop input control level with the optimal control input; and when the comparing the closed-loop input control level with the optimal control input is not favorable, adjusting the open-loop adjusted CO oscillation point until the comparing is favorable.

REFERENCES:
patent: 6157271 (2000-12-01), Black et al.
patent: 6741846 (2004-05-01), Welland et al.
patent: 2002/0132598 (2002-09-01), Saito
patent: 2003/0078022 (2003-04-01), Cai
patent: 2003/0171106 (2003-09-01), Dunworth et al.
patent: 2005/0266817 (2005-12-01), Welland et al.

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