Phase locked loop arrangement in which VCO frequency is a...

Oscillators – Automatic frequency stabilization using a phase or frequency... – With reference oscillator or source

Reexamination Certificate

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C327S007000, C327S009000, C331S027000

Reexamination Certificate

active

06333679

ABSTRACT:

This application claims priority under 35 U.S.C. §§119 and/or 365 to 9902210-5 filed in Sweden on Jun. 11, 1999; the entire content of which is hereby incorporated by reference.
TECHNICAL FIELD OF THE INVENTION
The present invention relates generally to a phase locked loop arrangement and a variable frequency synthesiser including such an arrangement. The invention furthermore relates to an arrangement for regulating a voltage controlled oscillator in a frequency synthesiser.
DESCRIPTION OF RELATED ART
Frequency synthesisers are used for producing signals with well defined frequencies. They appear in numerous applications in telecommunication systems and elsewhere. An example of such an application in a telecommunications system is when a variable frequency synthesiser is used as a local oscillator in a radio receiver.
A frequently used way to arrange such a synthesiser is to use a voltage controlled oscillator, VCO, which is regulated to output a signal with a frequency that is a multiple of the frequency of a signal outputted from a reference oscillator.
The VCO is then normally arranged in a so called phase locked loop, PLL, where the output from the VCO is fed via a frequency divider to an input of a phase detector. The output from a reference oscillator is fed to another input of the phase detector, the resulting output of which is depending upon the phase relationship between the inputted signals. The error signal thus outputted from the phase detector is then preferably fed via a loop filter and a summing unit to the control input of the VCO. The summing unit adds a DC voltage to the filtered signal from the phase detector and serves to coarsely tune the VCO.
In this manner the VCO can lock to the signal of the reference oscillator and will output a signal having a frequency that is a multiple of the reference frequency.
Frequency synthesisers as the above described are relatively simple and robust and are therefore widely spread in many applications. A problem often encountered with such PLL circuits is the extensive phase noise of the output signal.
Ideally the signal outputted from the reference oscillator would be a sine wave with constant frequency and phase, i.e. v(t)=V
0
·sin(&ohgr;t+&psgr;), where &ohgr; and &psgr; are constants. In the frequency domain this corresponds to a distinct spectral line at the frequency &ohgr;/2&pgr;. In reality, however, the signal must be modelled with a certain amount of phase noise, i.e. v(t)=V
0
·sin(&ohgr;t+&psgr;(t)), where the phase of the signal varies over time. In the frequency domain this corresponds to that the spectral line widens as it contains energy offset from the desired carrier frequency.
When a reference oscillator is utilised in the usual PLL circuit and the output frequency of the VCO is a multiple N of the frequency of the reference oscillator, the phase noise of the output signal will be m dB higher than the phase noise of the reference oscillator, where m=20·log(N). Therefore, for instance, if the multiple is N=8 the phase noise will be around 18 dB higher at the output of the VCO, than at the output of the reference oscillator. The multiplicating function, thus, aggravates the phase noise introduced into the PLL by the reference oscillator.
Some attempts aiming to remedy the problem with phase noise are known in the art. One such technique is described in U.S. Pat. No. 5,451,910, which is hereby incorporated by reference. Then a phase-locked loop is provided with a feedback network having an offset circuitry providing a signal with a frequency offset from the frequency of the signal outputted from a VCO. The feedback circuit further comprises a sampling mixer with an auxiliary reference frequency oscillator. The sampling mixer accomplishes a comb frequency spectrum from the offset signal. A filter extracts a particular frequency from the spectrum to the phase detector. This serves to divide the frequency of the signal outputted from the VCO that is fed to the phase detector without adding extra phase noise. It requires, however, that a phase offset circuitry, a number of mixers and an extra reference oscillator is introduced which adds complexity to the arrangement. It should also be noted that this technique does not address the problem with phase noise resulting from the fact that the reference oscillator frequency is being multiplied.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a phase locked loop arrangement, for a variable frequency synthesiser, with improved phase noise characteristics.
Another object of the invention is to provide a high precision variable frequency synthesiser that is simple and inexpensive to build.
Yet another object of the invention is to provide a high precision variable frequency with improved flexibility.
According to a first aspect of the invention the above mentioned object are fulfilled in a PLL arrangement where a VCO delivers an output signal with a predetermined relationship to the signal emitted by a reference oscillator. A phase detecting means receives an output signal from the VCO and an output signal from the reference oscillator. The frequency of the signal outputted from the reference oscillator is a multiple N of the frequency of the signal outputted from the VCO. N is then an integer greater than 1. This is instead of the conventional way where the VCO delivers a frequency which is a multiple of the frequency of the reference oscillator.
This results in a simple PLL arrangement with considerably improved phase noise characteristics. When the frequency of the VCO output signal is N times lower than the frequency of the reference oscillator, the phase noise of the output signal is m dB lower than the phase noise of the reference oscillator, where m=20·log(N).
Another advantage with this arrangement is that it allows the output frequency to be more arbitrarily chosen with regard to a given reference frequency. A frequency synthesiser of the known art involves a divider circuit which in most cases divides the frequency 2
k
times, where k is an integer. This normally restricts the freedom to chose the factor of multiplication. In the arrangement according to the invention the frequency of the reference oscillator may be divided by any integer, up to a certain fraction of the reference frequency.
In a preferred embodiment the phase detecting means is devised as a sample and hold circuit. A voltage level is produced, during a cycle of the signal received from the VCO, at the output of the phase detecting means that is depending on the voltage level of the signal received from the reference oscillator at a time when the signal of the VCO begins a cycle, i.e. the VCO samples the reference oscillator. This results in a simple arrangement that may change frequency by controlling a single DC voltage.
In another preferred embodiment the phase detecting means includes a frequency multiplier, adjusting the frequency of the signal received from the VCO and a mixer, multiplying the signal thus adjusted with the signal received from the reference oscillator. This results in an inexpensive arrangement that may be realised by means of standard multiplier components and which allows a high division of the reference frequency.
In yet another preferred embodiment the phase detecting means includes a comb unit, producing harmonics of the signal received from the VCO, a variable bandpass filter filtering the signal produced in the comb unit and a mixer multiplying the signal outputted from the variable bandpass filter with the signal received from the reference oscillator. This results in flexible circuit that may change frequency by controlling a single DC voltage.
According to another aspect of the invention the above mentioned objects are fulfilled by means of an arrangement for controlling a VCO in a phase locked loop in a frequency synthesiser. The arrangement comprises a phase detecting means delivering an output signal with a magnitude depending on the phase relationship between the signal outputted from

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