Phase locked loop and method for evaluating a jitter of a...

Pulse or digital communications – Testing – Phase error or phase jitter

Reexamination Certificate

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C375S376000

Reexamination Certificate

active

07496136

ABSTRACT:
A phase locked loop is disclosed having a phase detector and a controllable oscillator coupled to the detector. A frequency divider is also included in a feedback path of the phase locked loop. The phase locked loop further comprises an evaluation means that facilitates an evaluation of a jitter of the phase locked loop. This allows an on-chip evaluation of the jitter of a phase locked loop to be performed.

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