Phase locked loop and method for adjusting the frequency and...

Details Phase locked loop and method for adjusting the frequency and... Phase locked loop and method for adjusting the frequency and...

2008-06-04

2010-11-23

Chang, Joseph (Department: 2817)

Oscillators

Automatic frequency stabilization using a phase or frequency...

Tuning compensation

C327S156000, C375S376000

Reexamination Certificate

active

07839221

ABSTRACT:
A phase locked loop (PLL) which includes a phase frequency detector coupled with a time to digital converter capable of comparing a reference signal with an oscillator signal and generating a digital value representing the phase difference between the reference signal and the oscillator signal. The PLL further includes a state machine for phase acquisition that is capable of generating a control value depending on the digital value, and a controllable oscillator that is capable of generating the oscillator signal depending on the control value.

REFERENCES:
patent: 6429693 (2002-08-01), Staszewski et al.
patent: 6720959 (2004-04-01), Haroun et al.
patent: 6798296 (2004-09-01), Lin et al.
patent: 2007/0047689 (2007-03-01), Menolfi et al.

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