Phase locked loop and method for adjusting the frequency and...

Oscillators – Automatic frequency stabilization using a phase or frequency... – Tuning compensation

Reexamination Certificate

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Details

C327S156000

Reexamination Certificate

active

07403073

ABSTRACT:
A phase locked loop (PLL) which includes a phase frequency detector coupled with a time to digital converter capable of comparing a reference signal with an oscillator signal and generating a digital value representing the phase difference between the reference signal and the oscillator signal. The PLL further includes a state machine for phase acquisition that is capable of generating a control value depending on the digital value, and a controllable oscillator that is capable of generating the oscillator signal depending on the control value.

REFERENCES:
patent: 6429693 (2002-08-01), Staszewski et al.
patent: 2006/0171495 (2006-08-01), Youssouflan
patent: 2007/0047689 (2007-03-01), Menolfi et al.
patent: 1443653 (2004-08-01), None

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