Phase locked loop

Details Phase locked loop Phase locked loop

2007-05-15

2007-05-15

Nguyen, Long (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

C327S147000

Reexamination Certificate

active

10525862

ABSTRACT:
A phase locked loop comprising a phase detector (100) for determining a phase difference between a reference signal (Ref) and mutually phase shifted signals (I, Q) to generate frequency control signals (U, D), the phase detector (100) comprising: means (10) for obtaining a first one of said frequency control signals (U, D) by binary multiplication of the reference signal (Ref) and one of the relative phase shifted signals (I, Q); and means (20) for obtaining a second one of said frequency control signals (U, D) by binary multiplication of the relative phase shifted signals (I, Q).

REFERENCES:
patent: 6072370 (2000-06-01), Nakamura
patent: 6075416 (2000-06-01), Dalmia
patent: 6642747 (2003-11-01), Chiu
patent: 6683930 (2004-01-01), Dalmia
patent: 6915081 (2005-07-01), Takeshita et al.
patent: 2002/0053950 (2002-05-01), Takeshita et al.
patent: 1 496 397 (1977-12-01), None
patent: 2253316 (1992-02-01), None
patent: 2 253 316 (1992-09-01), None
Afonso J et al: “A Phase-Locked Loop with Digital Frequency Comparator for Timing Signal Recovery”, National Telecommunications Conference. Washington, DC, Nov. 27-29, 1979.

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