Phase lock loop with self test circuitry and method for using th

Details Phase lock loop with self test circuitry and method for using th Phase lock loop with self test circuitry and method for using th

1993-07-06

1995-01-10

Heyman, John S.

Electricity: measuring and testing

Measuring, testing, or sensing electricity, per se

Frequency of cyclic current or voltage

377 39, 331 44, 327159, G01R 2302

Patent

active

053810856

ABSTRACT:
A built in self test circuit for testing a phase lock loop (11). The built in self test circuitry comprises a pulse circuit (13), an And gate (19), a counter circuit (23), and an output multiplexer (24). The phase lock loop (11) receives a reference signal and generates an output signal. The pulse circuit (13) receives the reference signal and generates a pulse having a duration some multiple of the output signal of the phase lock loop. The And gate (19) receives the pulse output by pulse circuit (13) and the output signal of the phase lock loop (11) generating a string of pulses having the frequency of the output signal of the phase lock loop (11) for the duration of the pulse output by the pulse circuit (13). The counter circuit (23) receives the string of pulses and generates a count of the pulses. The count is compared to an expected count to determine the accuracy of the phase lock loop (11).

REFERENCES:
patent: 3878370 (1975-04-01), Santomango et al.
patent: 4533867 (1985-08-01), Witczac
patent: 4608706 (1986-08-01), Chang et al.
patent: 4786861 (1988-11-01), Hulsing et al.
patent: 5089770 (1992-02-01), Lee et al.

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