Phase lock loop with controllable lock time

Details Phase lock loop with controllable lock time Phase lock loop with controllable lock time

2005-02-15

2005-02-15

Pascal, Robert (Department: 2817)

Oscillators

Automatic frequency stabilization using a phase or frequency...

Tuning compensation

C327S156000

Reexamination Certificate

active

06856203

ABSTRACT:
An improved phase locked loop (PLL) includes a frequency multiplier and a voltage controlled oscillator (VCO). The VCO includes a control circuit for automatically adjusting its initial free-running frequency in response to changes in an integer divider value. The adjusting is done so that the frequency difference between the initial free-running frequency divided by the integer divider value and a reference frequency is maintained at an approximately constant value. This results in a controllable lock time that is independent of the integer divider value.

REFERENCES:
patent: 6163184 (2000-12-01), Larsson
patent: 6483390 (2002-11-01), Welland
patent: 20030206066 (2003-11-01), Harwood

Affiliated with

Also associated with

Rating

Phase lock loop with controllable lock time does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Phase lock loop with controllable lock time, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Phase lock loop with controllable lock time will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3450392