Oscillators – Automatic frequency stabilization using a phase or frequency... – Tuning compensation
Reexamination Certificate
2005-02-08
2005-02-08
Kinkead, Arnold (Department: 2817)
Oscillators
Automatic frequency stabilization using a phase or frequency...
Tuning compensation
C331S00100A, C331SDIG002, C331S025000, C455S260000, C375S376000, C327S156000, C327S159000
Reexamination Certificate
active
06853252
ABSTRACT:
A phase-locked loop having a programmable loop bandwidth is provided. A PLL comprises an oscillator operable to receive an error-correction signal and to generate an oscillator signal having a frequency that is related to the error-correction signal. The PLL further comprises a phase-frequency detector (PFD) coupled to the oscillator and operable to receive a reference signal and to generate the error-correction signal based upon a phase difference between the reference signal and a feedback signal derived from the oscillator signal. The PLL further comprises an error-correction signal suppression circuit coupled to the PFD and operable to control the loop bandwidth of the PLL by periodically enabling the PFD.
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patent: 6150889 (2000-11-01), Gulliver et al.
patent: 0 564 377 (1993-10-01), None
patent: 0 899 883 (1999-03-01), None
Linear Technology Corporation, “2-Phase, High Efficiency, Synchronous Step-Down Switching Regulators”, LTC 1929/LTC 1929-PG; 1999.
Semtech, Bi-Phase/Dual Controller, Power Management, SC2420, 2001.
Graybeal Jackson Haley LLP
Intersil Corporation
Kinkead Arnold
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