Phase lock loop frequency correction circuit

Details Phase lock loop frequency correction circuit Phase lock loop frequency correction circuit

1992-09-02

1994-01-11

Kuntz, Curtis

Pulse or digital communications

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331 11, 331 23, H03D 324

Patent

active

052788741

ABSTRACT:
A phase lock loop circuit (10) which locks to a frequency within a range of input signal frequencies. A frequency discriminator (12) of phase lock loop circuit (10) determines a maximum pulse width of the input signal by counting a number of pulses of a reference signal in each of a series of pulses of the input signal. A coarse frequency controller (16) compares the maximum pulse width to two threshold values to determine whether the reference signal should be coarsely or finely adjusted. If the reference signal is coarsely adjusted, control circuit (16) provides a coarse frequency control signal to indicate whether a voltage controlled oscillator, VCO, (26) should increase or decrease the reference frequency. If the reference frequency is finely adjusted, a phase discriminator (22) provides a fine frequency control signal to the VCO to either increase or decrease the frequency of the reference signal with greater resolution.

REFERENCES:
patent: 4590602 (1986-05-01), Wolaver
"MECL Device Data" Rev. 4 published by Motorola, Inc. in 1989, pp. 6-20 to 6-34.

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