Phase lock loop circuit with variable loop gain

Oscillators – Automatic frequency stabilization using a phase or frequency... – With reference oscillator or source

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331 8, 331 17, 331DIG2, 327 5, H03L 7085, H03L 7095, G01R 2500

Patent

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059735724

ABSTRACT:
A PLL (phase lock loop) circuit improves pull-in and noise performances by changing a loop gain based on the loop states. The PLL circuit includes a voltage controlled oscillator (VCO) for generating an oscillation signal whose oscillation frequency is controlled by a control voltage provided thereto, a phase comparator for detecting a phase difference between the oscillation signal from the VCO and a reference signal wherein a detection gain of the phase difference is regulated by a bias voltage provided thereto, a low pass filter for receiving an output signal of the phase comparator for removing high frequency components therefrom to produce the control voltage supplied to the VCO, a phase lock loop formed by the VCO, phase comparator and low pass filter, and a phase lock detection circuit for detecting whether the phase lock loop has reached a phase lock state and changing the bias voltage to decrease the detection gain of the phase comparator when the phase lock loop has reached the lock state.

REFERENCES:
patent: 4596963 (1986-06-01), Lawton et al.
patent: 4605909 (1986-08-01), Tsironis
patent: 4704722 (1987-11-01), Henry
patent: 5038116 (1991-08-01), Motte 331 8

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