Phase-lock loop circuit with improved output signal jitter perfo

Details Phase-lock loop circuit with improved output signal jitter perfo Phase-lock loop circuit with improved output signal jitter perfo

1989-12-07

1990-11-20

Grimm, Siegfried H.

Oscillators

Automatic frequency stabilization using a phase or frequency...

Afc with logic elements

331 17, 331 2J, H03L 7085

Patent

active

049721607

ABSTRACT:
A phase locked loop has a phase detector which receives an input signal, a divided output signal from a VCO and a local clock signal, and produces a binary number representing the phase relationship between the input and divided signals. The binary number is applied to a microprocessor which compares it to a predetermined number n and controls the VCO through a D/A converter. To reduce output signal jitter, the microprocessor adjusts the VCO frequency so that the binary number alternates between n and n--1 or between n and n+1.

REFERENCES:
patent: 3931585 (1976-01-01), Barker et al.
patent: 4450518 (1984-05-01), Klee
patent: 4503400 (1985-03-01), Edwards et al.
patent: 4519071 (1985-05-01), Miller
patent: 4724402 (1988-02-01), Ireland
patent: 4748644 (1988-05-01), Silver et al.

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