Phase lock loop circuit with delaying phase frequency...

Details Phase lock loop circuit with delaying phase frequency... Phase lock loop circuit with delaying phase frequency...

2006-12-12

2009-10-06

Chang, Joseph (Department: 2817)

Oscillators

Automatic frequency stabilization using a phase or frequency...

Particular error voltage control

C331S016000

Reexamination Certificate

active

07598816

ABSTRACT:
A phase locked loop (PLL) circuit includes circuitry for preventing an erroneous condition in charge pump operation. The PLL circuit is modified by adding delay elements for connection between the phase frequency detector and the charge pump. A digital logic circuit is also included to provide the clock signals for the loop filter wherein the clock signals have rising edges corresponding to an earlier occurring rising edge of either of the output signals from the phase-frequency detector.

REFERENCES:
patent: 6420917 (2002-07-01), Klemmer
patent: 2006/0012438 (2006-01-01), Chou et al.
patent: 2007/0052489 (2007-03-01), Ballantyne et al.

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