Phase lock indicator circuit for a high frequency recovery loop

Details Phase lock indicator circuit for a high frequency recovery loop Phase lock indicator circuit for a high frequency recovery loop

1993-09-16

1996-10-22

Vu, Kim Yen

Pulse or digital communications

Receivers

Automatic frequency control

375327, 375373, 375376, H03D 324

Patent

active

055685218

ABSTRACT:
An improved phase locked indication circuit for a Costas QPSK carrier recovery loop comprises an inphase channel, a quadrature channel and phase error channel each connected to an input of a three input summing circuit through a diode square law multiplier and wherein the error channel signal is filtered by a low pass filter to smooth the signal before being applied to the negative input of the summing circuit to diminish false lock and not locked signals. The locked and not lock conditions are separated one from the other by a large signal to noise ratio.

REFERENCES:
patent: 4048566 (1977-09-01), Carson et al.
patent: 4344178 (1982-08-01), Waters
patent: 4475218 (1984-10-01), Takeda et al.
patent: 4795986 (1989-01-01), Ceroni
patent: 4856027 (1989-08-01), Nakamura et al.
patent: 4870382 (1989-09-01), Keate et al.
patent: 4871975 (1989-10-01), Nawata et al.
patent: 4901332 (1990-02-01), Williams et al.
patent: 5063577 (1991-11-01), Arbanas et al.
patent: 5121071 (1992-06-01), Kelly et al.

Affiliated with

Also associated with

Rating

Phase lock indicator circuit for a high frequency recovery loop does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Phase lock indicator circuit for a high frequency recovery loop, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Phase lock indicator circuit for a high frequency recovery loop will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2365481