Phase interpolator

Pulse or digital communications – Synchronizers

Reexamination Certificate

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Details

C375S371000, C375S373000, C327S002000, C327S141000

Reexamination Certificate

active

10039253

ABSTRACT:
An arrangement for generating a clock signal. Embodiments provide a method, apparatus, system, and machine-readable medium to interpolate phases of a reference clock signal to output an interpolated clock signal. Some embodiments may output the clock signal as a recovered clock signal for a phase interpolator-based clock recovery system. Many embodiments may interpolate a changing phase of an interpolated clock signal with substantially analog transitions.

REFERENCES:
patent: 6285726 (2001-09-01), Gaudet
patent: 6380783 (2002-04-01), Chao et al.
patent: 6385126 (2002-05-01), Jung et al.
patent: 6484268 (2002-11-01), Tamura et al.
patent: 6509773 (2003-01-01), Buchwald et al.
patent: 6943606 (2005-09-01), Dunning et al.
patent: 6947510 (2005-09-01), Dietl et al.
patent: 2003/0122588 (2003-07-01), Glenn
patent: 2003/0123594 (2003-07-01), Glenn et al.

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