Phase interpolation apparatus, systems, and methods

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Phase shift by less than period of input

Reexamination Certificate

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C327S235000, C708S290000

Reexamination Certificate

active

07443219

ABSTRACT:
A phase interpolator circuit may comprise a multiplexer circuit (MUX) coupled to a plurality of clock signals at MUX inputs and may provide a first clock signal and a second clock signal at MUX outputs that are out of phase with each other, a digital to analog converter circuit (DAC) to convert a digital input to first and second DAC current outputs such that a sum of the first and second DAC output currents comprises a substantially constant current value, a weighted averager circuit coupled to the MUX and the DAC, and a variable capacitive load circuit coupled to the first and second DAC current outputs. The weighted averager circuit may operate to sum weighted first and second clock signals and to output a phase interpolated clock signal, wherein the first clock signal is weighted according to a first DAC output current and the second clock signal is weighted according to a second DAC output current. Other apparatus, systems, and methods are disclosed.

REFERENCES:
patent: 4686688 (1987-08-01), Chung et al.
patent: 5541961 (1996-07-01), Farrow

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