Phase-independent clock circuit and method

Pulse or digital communications – Synchronizers – Frequency or phase control using synchronizing signal

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Details

375371, H03D 1300

Patent

active

057990492

ABSTRACT:
A circuit and method are provided for generating a programmable clock signal VRCLK at a frequency of a reference signal VREF such that the phase of VRCLK in relation to the phase of VREF is variable. VREF and VRCLK are each coupled to a frequency comparing circuit which computes their respective frequencies. The frequency comparing circuit subtracts the respective frequencies of VREF and VRCLK to produce a frequency adjusting signal VFREQ which corresponds to the difference in the frequencies of VREF and VRCLK. VFREQ is used to adjust the frequency of VRCLK.

REFERENCES:
patent: 5511100 (1996-04-01), Lundberg et al.

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