Pulse or digital communications – Receivers
Reexamination Certificate
2006-08-29
2006-08-29
Vo, Don N. (Department: 2611)
Pulse or digital communications
Receivers
C375S375000
Reexamination Certificate
active
07099407
ABSTRACT:
In order to solve the problem that since a loop filter constant suitable for asynchronous state cannot be selected in the conventional phase frequency synchronism circuit, it takes a long time to synchronize the input data and the clock signal from the asynchronous state, the present invention is to propose a phase frequency synchronism circuit including a phase comparator for generating a voltage according to the phase difference of the clock signal to the input signal, a frequency comparator for deciding if the frequency of the clock signal is higher or lower than the transmission rate of the input signal and generating a binary signal, a synchronous identifying unit for deciding if the input signal and the clock signal are synchronized in their phases and frequencies, a first switch that receives the output from the phase comparator and is closed and opened when the synchronous identifying unit decides that they are synchronized and not synchronized, respectively, a second switch that receives the output from the frequency comparator and is opened and closed when the synchronous identifying unit decides that they are synchronized and not synchronized, respectively, a loop filter that receives the outputs from the first and second switches, and a voltage controlled oscillator that oscillates on the basis of the output from the loop filter.
REFERENCES:
patent: 4069462 (1978-01-01), Dunn
patent: 4682116 (1987-07-01), Wolaver et al.
patent: 4736243 (1988-04-01), Takanashi et al.
patent: 4942370 (1990-07-01), Shigemori
patent: 4996596 (1991-02-01), Hirao et al.
patent: 5389898 (1995-02-01), Taketoshi et al.
patent: 5525935 (1996-06-01), Joo et al.
patent: 6097440 (2000-08-01), Omori et al.
patent: 03-048578 (1991-01-01), None
patent: 06-104748 (1994-04-01), None
patent: 6-216766 (1994-08-01), None
patent: 9-284269 (1997-10-01), None
Ansgar Pottbecker, et al., “TP 10.3: A 8Gb/s Si Bipolar Phase and Frequency Detector IC for Clock Extraction,”1992 IEEE International Solid State Circuits Conference(Feb. 20, 1992), Paper 10.3, pp. 162-163
Aoki Tetsuya
Hasegawa Atsushi
Yamashita Takeshi
OpNext Japan, Inc.
Vo Don N.
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