Phase-frequency detector with gated reference clock input

Details Phase-frequency detector with gated reference clock input Phase-frequency detector with gated reference clock input

2006-08-01

2006-08-01

Callahan, Timothy P. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific signal discriminating without subsequent control

By phase

C327S008000

Reexamination Certificate

active

07084670

ABSTRACT:
A gated phase-frequency detector circuit includes a phase-frequency detector and a multiplexer circuit. The phase-frequency detector is arranged to provide UP and DOWN signals responsive to a reference clock signal and a feedback signal. Further, the phase-frequency detector includes a first flip-flop that provides the UP signal, a second flip-flop that provides the DOWN signal, and a clear logic circuit. One input of the multiplexer circuit is coupled to the output of the first flip-flop, another input of the multiplexer circuit is arranged to receive a logic high signal, and an output of the multiplexer circuit is coupled to the D input of the first flip-flop. The multiplexer circuit is arranged to multiplex the logic high signal and the UP signal responsive to a reference gate signal. If the reference gate signal corresponds to an active level, logic level of the UP signal does not change.

REFERENCES:
patent: 5727038 (1998-03-01), May et al.
patent: 6084479 (2000-07-01), Duffy et al.
patent: 6215362 (2001-04-01), Feng et al.
patent: 6310521 (2001-10-01), Dalmia
patent: 6642747 (2003-11-01), Chiu
patent: 2002/0021368 (2002-02-01), Uto

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