Phase estimating circuit and demodulating circuit

Details Phase estimating circuit and demodulating circuit Phase estimating circuit and demodulating circuit

1998-03-25

1999-11-02

Mis, David

Demodulators

Phase shift keying or quadrature amplitude demodulator

Input signal combined with local oscillator or carrier...

329310, 375329, 375324, H03D 300, H04L 2722, H04L 2738

Patent

active

059778202

ABSTRACT:
The presence or absence of a clock component is detected for an input signal. If the input signal does not comprise a clock component, the operation of a computing circuit is halted, thereby further improving the accuracy of phase estimation. A signal generating circuit produces a twiddle factor for DFT. A DFT circuit performs discrete Fourier transform on an input signal for a predetermined number of symbols based on the twiddle factor for DFT. A pattern detecting circuit examines the input signal for its pattern based on the output from the DFT circuit. An averaging filter turns on or off the operation of the subsequent averaging filter according to the detected pattern, and averages the outputs from the DFT circuit to remove a noise component.

REFERENCES:
patent: 5228025 (1993-07-01), Le Floch et al.
patent: 5657355 (1997-08-01), Reusens
patent: 5870438 (1999-02-01), Olafsson

Affiliated with

Also associated with

Rating

Phase estimating circuit and demodulating circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Phase estimating circuit and demodulating circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Phase estimating circuit and demodulating circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2140616