Phase error correction circuit for a high speed frequency...

Details Phase error correction circuit for a high speed frequency... Phase error correction circuit for a high speed frequency...

2007-04-17

2007-04-17

Wells, Kenneth B. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synthesizer

C327S107000

Reexamination Certificate

active

11045929

ABSTRACT:
Circuits, methods, and apparatus for reducing the phase error in an NCO clock output to reduce the clock jitter. This is particularly beneficial where the frequencies of the NCO output and reference signal are unrelated. One embodiment provides a circuit that corrects the phase of the NCO output in two steps in order to obtain a substantially glitch-free, high-speed operation. During the first step, the output of the NCO is phase shifted to the closest quarter portion of a cycle of a clock signal. A second correction step is then performed by steering a number of currents under the control of at least some of a number of remainder bits from the NCO. The current steering provides a die area efficient, low-noise phase correction. The decoded remainder bits are latched using a feed forward circuit that prevents the device from entering a locked state.

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