Phase dither of an acquisition clock using a phase lock loop

Details Phase dither of an acquisition clock using a phase lock loop Phase dither of an acquisition clock using a phase lock loop

1997-08-11

1999-05-04

Wells, Kenneth B.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

327158, 327159, 324121R, 324 7915, 324 7624, H03L 706

Patent

active

059007559

ABSTRACT:
The phase of an acquisition clock for a digital oscilloscope is modulated by summing an offset voltage with the output of the phase detector of a phase lock loop. The offset voltage is generated by a digital-to-analog converter which is fed input values by a microprocessor running a number generator routine.

REFERENCES:
patent: 4077016 (1978-02-01), Sanders et al.
patent: 4388598 (1983-06-01), Egan
patent: 4724401 (1988-02-01), Hogge, Jr. et al.
patent: 5115189 (1992-05-01), Holcomb
patent: 5180971 (1993-01-01), Montijo
patent: 5451910 (1995-09-01), Guthrie
patent: 5521947 (1996-05-01), Madsen
patent: 5579184 (1996-11-01), Nakanishi et al.

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