Phase dither of an acquisition clock using a delay lock loop

Details Phase dither of an acquisition clock using a delay lock loop Phase dither of an acquisition clock using a delay lock loop

1997-06-27

1998-08-04

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

327147, 327156, 327244, 324121R, G01R 1320

Patent

active

057899541

ABSTRACT:
The phase of an acquisition clock for a digital oscilloscope is modulated by summing an offset voltage with the output of the phase detector of a delay lock loop. The offset voltage is generated by a digital-to-analog converter which is fed input values by a microprocessor running a number generator routine.

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Hewlett-Packard Journal, Oct. 1993; "An 8-Gigasample-per-Second, 8-Bit Data Acquisition System for a Sampling Digital Oscilloscope"; pp. 11-23.

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