Phase difference detector

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

Patent

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Details

307232, 328 55, H03K 520, H03K 386

Patent

active

041785541

ABSTRACT:
There is provided a pair of flip-flops, each of which is set before appearance of every one of two input signals to be compared. One of the input signals is applied to a reset terminal of the first flip-flop through an inverter, and the other input signal to that of the second flip-flop through another inverter. There is further provided a pair of AND gates. A set output of the first flip-flop is led to one of two input terminals of the first AND gate through a delay element, and a reset output of the second flip-flop is connected to the other input terminal of the first AND gate directly. The set output of the output of the second flip-flop is coupled to one of two input terminals of the second AND gate through another delay element and the reset output of the first flip-flop is connected to the other input terminal second AND gate directly.

REFERENCES:
patent: 3328688 (1967-06-01), Brooks
patent: 3430148 (1969-02-01), Miki
patent: 3521172 (1970-07-01), Harmon
patent: 3600690 (1971-08-01), White
patent: 3987365 (1976-10-01), Okada
patent: 4037116 (1977-07-01), Hodama

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