Patent
1975-10-31
1976-10-12
Heyman, John S.
328109, 328133, 328 55, 328155, H03K 302
Patent
active
039861252
ABSTRACT:
A phase detector comprising three bistable flops and a NAND gate interconnected to respond to a data input pulse stream and a controlled square wave clock pulse stream to provide, in response to each data pulse, a reference pulse having a width equal to one-half the clock pulse period and a variable pulse having a nominal width equal to that of the reference pulse and a proportionately greater or lesser width according to the direction and amount of displacement of the data pulse from the center of the clock period in which it occurs.
REFERENCES:
patent: 3393367 (1968-07-01), Vallee
patent: 3619793 (1971-11-01), Broome
patent: 3634869 (1972-01-01), Hsueh
patent: 3798556 (1974-03-01), Ooya et al.
patent: 3922610 (1975-11-01), Buchan et al.
Battjer Eugene T.
Heyman John S.
Kapustin Sheldon
Sperry Univac Corporation
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