Phase detector for high speed clock recovery from random binary

Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By phase

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327 12, H03D 1300

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active

060345543

ABSTRACT:
An improved phase detector for detecting the difference between an information signal and a clock signal is provided. The information signal is divided into a plurality of N divided signals, the data rate of each divided signal being the data rate of the information signal divided by N. A plurality of N variable width difference pulse signals are generated each being responsive to the phase difference between a divided signal and the clock signal. One or more fixed width reference pulse signals having a width proportional to one-half clock period are also generated. A phase error signal is then provided in response to the N difference pulse signals and the one or more reference pulse signals. Preferably, N is equal to 2.sup.M, where M is a positive integer greater than or equal to one.

REFERENCES:
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Thomas H. Lee, "A 155-Mhz Clock Recovery Delay--and Phase-Locked Loop", IEEE Journal of Solid-State CircuitsDec. 27, (1992), No. 12, New York, US pp. 1736-1746.

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