Phase detector for comparing phases of data and a plurality...

Details Phase detector for comparing phases of data and a plurality... Phase detector for comparing phases of data and a plurality...

2005-10-07

2009-11-03

Liu, Shuwang (Department: 2611)

Pulse or digital communications

Receivers

Angle modulation

C327S040000, C327S041000, C327S043000, C327S158000, C342S442000, C375S373000, C375S376000

Reexamination Certificate

active

07613254

ABSTRACT:
A phase detector that compares the phases of data and four-phase first to fourth clocks having a half rate of the data and being 90° out of phase with one another. Exemplary embodiments of the phase detector include first to fourth sampling circuits that sample the data by the four-phase first to fourth clocks; a first comparator that compares sampling data obtained by sampling according to the adjacent two-phase first and second clocks using the first and second sampling circuits, respectively, and when the sampling data is different, outputs a first up signal; and a second comparator that compares sampling data obtained by sampling according to the adjacent two-phase fourth and first clocks using the fourth and first sampling circuits, respectively, and when the sampling data is different, outputs a first down signal.

REFERENCES:
patent: 4773085 (1988-09-01), Cordell
patent: 6590457 (2003-07-01), Schrodinger
patent: 7042252 (2006-05-01), Galloway et al.
patent: 7340655 (2008-03-01), Sugita
Jonathan E. Rogers and John R. Long, “A 10-GB/S CDR/DEMUX with LC delay Line VCO in 0.18-0.18 μm CMOS” , IEEE Journal of Solid-State circuits, vol. 37 , No. 12, Dec. 2002.

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