Phase detector, clock distribution circuit, and LSI

Details Phase detector, clock distribution circuit, and LSI Phase detector, clock distribution circuit, and LSI

2006-09-05

2006-09-05

Wells, Kenneth B. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Particular stable state circuit

C327S201000, C327S003000, C327S012000, C365S233100

Reexamination Certificate

active

07102406

ABSTRACT:
A phase detector includes a first selection circuit configured to select a first clock from a first group of clocks supplied to the first selection circuit and to transmit the first clock, and at least one phase comparator configured to detect a difference in phases between the first clock and a second clock supplied to the phase comparator and to transmit the difference as a scan signal.

REFERENCES:
patent: 6429687 (2002-08-01), Ishihara et al.
Vadim Gutnik, et al. “Active GHz Clock Network Using Distributed PLLs”, 2000 IEEE International Solid-State Circuits Conference, pp. 174-175.
Nasser A. Kurd, et al. “A Multigigahertz Clocking Scheme for the Pentium 4 Microprocessor”, IEEE Journal of Solid-State Circuits, vol. 36, No. 11, Nov. 2001, pp. 1647-1653.
Charles E. Dike, et al. “A Design for Digital, Dynamic Clock Deskew”, 2003 Symposium on VLSI Circuits Digest of Technical Papers, Session 2 Advanced Clock Design, pp. 21-24.

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