Phase detector and phase-locked loop apparatus

Oscillators – Automatic frequency stabilization using a phase or frequency... – Afc with logic elements

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331 2, 331 25, 455260, 360 51, H03L 708

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047663979

ABSTRACT:
Disclosed is an improved phase detector apparatus which includes a charge pump. The charge pump includes a first integrating node and a second integrating node. The first and second integrating nodes generate node voltages which ramp downward and upward during a given period of a reference signal. When a signal is received to which a reference signal is to be locked on, the integrating sequence of the first and second nodes is altered so that the differential voltage across the nodes indicates a difference in phase between the reference signal and the second signal. A filter is connected between the output signal and the first integrating node, while the second integrating node is referenced to a DC bias level and returns to that level at the beginning and end of each cycle. The charge pump apparatus is driven by variable current sources which give the apparatus a variable frequency response. The frequency response is variable over a very wide range by the inclusion of multiple banks of variable current sources which can be switched in and out for driving the charge pump apparatus as desired. Also disclosed is a phase-lock loop apparatus employing the improved phase detector.

REFERENCES:
patent: 4565976 (1986-01-01), Campbell
patent: 4567448 (1986-01-01), Ikeda
patent: 4686481 (1987-08-01), Adams
K. A. Shidler, Rapid Synchronization Circuit for a Phase-Lock Oscillator, IBM Technical Bulletin, vol. 16, No. 11, Apr. 1974, pp. 3719-3722.

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