Phase detector

Details Phase detector Phase detector

2007-07-31

2007-07-31

Wachsman, Hal (Department: 2857)

Data processing: measuring, calibrating, or testing

Measurement system in a specific environment

Electrical signal parameter measurement system

C702S182000, C702S189000, C331S002000, C331S025000, C329S304000, C329S311000, C375S226000, C375S260000, C375S373000

Reexamination Certificate

active

10569125

ABSTRACT:
The present invention concerns a phase Detector for detecting a phase difference between a data clock DATA-CLK and a reference clock REF-CLK using a data signal DATA. A trasnsition of the data signal DATA is synchronous with a transition of the data clock DATA-CLK. The data clock DATA-CLK and the reference clock REF-CLK have the same frequency. The phase detector includes first signal generator for generating a first binary signal ERRQ a second signal generator for generating a second binary signal ERRI. The pulse width of the second binary signal ERRI is equal to a second time difference ΔT2between a transition of the data signal DATA and a transition of the second reference clock signal CKI adjacent to the transition of the data signal DATA.

REFERENCES:
patent: 5805108 (1998-09-01), Lennen
patent: 5831461 (1998-11-01), Dawe
patent: 6016080 (2000-01-01), Zuta et al.
patent: 6028898 (2000-02-01), Sparks et al.
patent: 6151356 (2000-11-01), Spagnoletti et al.
Renaud et al., ‘A CMOS Three-State Frequency Detector Complementary to An Enhanced Linear Phase Detector for PLL, DLL or High Frequency Clock Skew Measurement’, 2003, IEEE Publication, pp. 148-151.
Wantanabe et al., ‘An All-Digital PLL for Frequency Multiplication by 4 to 1022 with Seven-Cycle Lock Time’, Feb. 2003, IEEE Publication, vol. 38, No. 2, pp. 198-204.

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