Phase controlled decoder for bubble memories

Details Phase controlled decoder for bubble memories Phase controlled decoder for bubble memories

1979-03-08

1980-10-14

Canney, Vincent P.

Static information storage and retrieval

Magnetic bubbles

Decoder

365 16, G11C 1908

Patent

active

042285216

ABSTRACT:
An on-chip magnetic bubble decoder comprising a plurality of sequentially operated gates oriented to be responsive to different phases of the rotating in-plane magnetic field and connected to a conductor which is pulsed at the selected phase of the cycle to transfer bubbles from one track onto different tracks to be propagated therefrom. In its simplest form, one gate oriented to be operated during the phase 2 time of the cycle and a second gate oriented to be responsive to the phase 1 time of the cycle, all operable by a single conductor, thus form a four output decoder with two gates and a single conductor. A second conductor controls a third gate which modulates the bubble stream to control the data being decoded.Further embodiments of the invention include 8 output decoder (2 data bits decoded into 1 of 4 paths) with only two conductors for activating the gates and a 1 of 16 output decoder with 2 conductors for decoding and a third for data control. In another embodiment the 16 output decoder is arranged with the data control gates located at the decoder output to reduce write cycle latency.

REFERENCES:
patent: 4094005 (1979-06-01), Chen

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