Phase compensation circuit of digital processing PLL

Details Phase compensation circuit of digital processing PLL Phase compensation circuit of digital processing PLL

1998-12-22

2000-11-21

Ton, My-Trang Nu

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

375376, H03L 706

Patent

active

061508586

ABSTRACT:
The present invention is to provide a phase compensation circuit of a DPPLL capable of hitless switching during switching the system clock, by exact matching frequency and phase of the DPPLL about phase difference which is less than minimum differential phase which may be detectable the way of digital and by distinguishing phase difference about the other party clock such that each clock unit commonly has the clock generated from the pair of clock units, alternatively and by switching the system clock in case that there is no difference after distinguishing, in the clock supplying system using the pair of lock units which have the phases that is asynchronized to the reference clock.

REFERENCES:
patent: 5673004 (1997-09-01), Park
patent: 5696468 (1997-12-01), Nise
patent: 5917873 (1999-06-01), Shiomoto et al.
patent: 5920214 (1999-07-01), Lee et al.
patent: 5986485 (1999-11-01), O'Sullivan

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