Phase-comparison circuit

Details Phase-comparison circuit Phase-comparison circuit

2000-01-20

2001-10-09

Callahan, Timothy P. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific signal discriminating without subsequent control

By phase

C327S236000, C327S359000, C327S563000, C330S252000

Reexamination Certificate

active

06300803

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a phase-comparison circuit converting two voltage signals into current signals in accordance with a difference in phase between those two voltage signals.
2. Description of the Related Art
There have been suggested many current mirror circuits, for instance, as suggested in Japanese Unexamined Patent Publications Nos. 61-74405, 62-291210 and 10-145154.
An example of a conventional current mirror circuit is illustrated in
FIGS. 1
to
3
.
A current mirror circuit illustrated in
FIG. 1
is comprised of a first PNP transistor
61
, a second PNP transistor
62
having a base electrically connected to a base of the first PNP transistor
61
, a first resistor
63
electrically connected to an emitter of the first PNP transistor
61
, a second resistor
64
electrically connected to an emitter of the second PNP transistor
62
, and a reference current source
65
electrically connected to a collector of the first PNP transistor
61
. A base is shortcircuited to a collector in the first PNP transistor
61
.
The current mirror circuit has an advantage that it can operate even at a low voltage, but is accompanied with a problem that a base current in both the first and second PNP transistors
61
and
62
acts as an error current, resulting in poor efficiency in conversion of a current mirror output current. That is, when amplification factors A of the first and second PNP transistors
61
and
62
are low, a current mirror output current supplied from a collector of the second PNP transistor
62
is not coincident with a reference current supplied from the reference current source
65
.
The current mirror circuit illustrated in
FIG. 1
is accompanied further with a problem that if a voltage between a collector and a base in the second PNP transistor
62
is increased, an error in conversion of a current mirror output current would be increased due to Early effect. If the first and second resistors
63
and
64
are designed to have greater values in order to prevent the current mirror circuit from being influenced by Early effect, there is posed another problem that the current mirror circuit cannot operate at a low voltage.
FIG. 2
illustrates another current mirror circuit having been suggested for the purpose of enhancing a current conversion efficiency caused by a base current in the current mirror circuit illustrated in FIG.
1
.
In the current mirror circuit illustrated in
FIG. 2
, a third PNP transistor
66
is electrically connected across a base and a collector of the first PNP transistor
61
in place of the arrangement illustrated in
FIG. 1
wherein a base and a collector are shortcircuited to each other in the first PNP transistor
61
.
The addition of the third PNP transistor
66
causes a base current in the first and second PNP transistors
61
and
62
to be almost equal to 1/A
2
. Since this base current flows through the reference current source
65
, it is possible to reduce a conversion error in a current mirror current.
However, the current mirror circuit illustrated in
FIG. 2
is accompanied with a problem that two PNP transistors
61
(or
62
) and
66
which are in series connected between power sources Vss and Vcc are not compatible with operation of the current mirror circuit at a low voltage.
A so-called Wilson type current mirror circuit solves this problem. That is, a so-called Wilson type current mirror circuit includes transistors electrically connected in series to each other, but can operate at a low voltage.
An example of a Wilson type current mirror circuit is illustrated in FIG.
3
.
The illustrated Wilson type current mirror circuit is comprised of a first PNP transistor
67
, a second PNP transistor
68
having a base electrically connected to a base of the first PNP transistor
67
, a third PNP transistor
69
having an emitter electrically connected to a collector of the first PNP transistor
67
, a fourth PNP transistor
70
having a base electrically connected to a base of the third PNP transistor
69
and an emitter electrically connected to a collector of the second PNP transistor
68
, and a constant-current source
71
electrically connected to a collector of the third PNP transistor
69
. Bases and collectors in both the second and third PNP transistors
68
and
69
are shortcircuited to each other.
The current mirror circuit illustrated in
FIG. 3
can provide a higher current conversion efficiency than the same in the current mirror circuit illustrated in FIG.
2
.
As mentioned above, a current mirror circuit is generally accompanied with a problem that it is quite difficult to satisfy both operation at a low voltage and enhancement in a current conversion efficiency.
FIG. 4
is a block diagram of a phase-comparison circuit including a current mirror circuit. A phase-comparison circuit is a circuit for converting two voltage signals input thereto into current signals in accordance with a phase difference between those voltage signals.
A phase-comparison circuit illustrated in
FIG. 4
includes first to fifteenth transistors Q
1
to Q
15
.
Two voltage signals Vin
1
and Vin
2
are input into the phase-comparison circuit through input terminals
10
and
11
. The voltage signal Vin
1
is applied to bases of the seventh NPN′ transistor Q
7
, the eighth NPN transistor Q
8
, the ninth NPN transistor Q
9
, and the tenth NPN transistor Q
10
. Similarly, the voltage signal Vin
2
is applied to bases of the eleventh NPN transistor Q
11
and the twelfth NPN transistor Q
12
.
The first PNP transistor Q
1
has an emitter electrically connected to power source voltage Vcc, and a collector electrically connected to a base of the second PNP transistor Q
2
, a collector of the seventh NPN transistor Q
7
, and a collector of the ninth NPN transistor Q
9
. A collector current of the first PNP transistor Q
1
is supplied to a collector of the seventh NPN transistor Q
7
as a reference current Iref.
The second PNP transistor Q
2
has an emitter electrically connected to bases of the first PNP transistor Q
1
and the sixth PNP transistor Q
6
.
Each of the seventh and eighth NPN transistors Q
7
and Q
8
has an emitter electrically connected to a collector of the eleventh NPN transistor Q
11
. Each of the ninth and tenth NPN transistors Q
9
and Q
10
has an emitter electrically connected to a collector of the twelfth NPN transistor Q
12
. The eleventh and twelfth NPN transistors Q
11
and Q
12
are electrically connected through emitters thereof to a constant-current source
12
.
The third PNP transistor Q
3
has an emitter electrically connected to the power source voltage Vcc, a collector electrically connected to a base of the fourth PNP transistor Q
4
, a collector of the tenth NPN transistor Q
10
, and a collector of the eighth NPN transistor Q
8
, and a base electrically connected to both an emitter of the fourth PNP transistor Q
4
and a base of the fifth PNP transistor Q
5
.
The fifth PNP transistor Q
5
has an emitter electrically connected to the power source voltage Vcc, and a collector electrically connected to both a base of the fourteenth NPN transistor Q
14
and a collector of the thirteenth NPN transistor Q
13
.
The sixth PNP transistor Q
6
has an emitter electrically connected to the power source voltage Vcc, and a collector electrically connected to a collector of the fifteenth NPN transistor Q
15
.
The fourteenth NPN transistor Q
14
has a collector electrically connected to the power source voltage Vcc, and an emitter electrically connected to bases of the thirteenth and fifteenth NPN transistors Q
13
and Q
15
.
The second PNP transistor Q
2
is grounded through a collector thereof. The fourth PNP transistor Q
4
is grounded through a collector thereof. The thirteenth NPN transistor Q
13
is grounded through an emitter thereof. The fifteenth NPN transistor Q
15
is grounded through an emitter thereof
In the phase-comparison circuit including a current mirror circuit, illustrated in
FIG. 4
, a collector current in the sixth PNP transistor Q
6
i

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