Television – Synchronization – Automatic phase or frequency control
Reexamination Certificate
1998-04-27
2001-10-30
Lee, Michael (Department: 2614)
Television
Synchronization
Automatic phase or frequency control
C348S549000, C348S505000, C327S159000, C327S156000, C331S020000
Reexamination Certificate
active
06310653
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to the synthesis of a periodic digital signal having a frequency that is specified by the frequency of a periodic reference signal that is asynchronous with respect to a sampling clock of the periodic digital signal. A preferred embodiment of the present invention specifically relates to a digital video system in which a digital color subcarrier is synthesized and synchronized to a reference frequency of a crystal oscillator that is asynchronous with respect to a digital system clock for the digital video system.
2. Background Art
Due to advances in semiconductor technology such as large scale integration and complementary metal-oxide-semiconductor processes suitable for mixed analog and digital applications, it has become common to fabricate complex integrated circuit chips that perform traditional analog signal processing functions in the digital domain. Typically the signal processing is performed by digital logic that is synchronized to a system clock that determines the digital sampling rate. The traditional analog signal processing functions, however, may require the use or manipulation of carrier signals that are asynchronous to the system clock.
Although it is known that a carrier signal can be generated by a digital oscillator circuit, the frequency of a carrier signal generated by the digital oscillator circuit is a function of frequency of the system clock. Therefore, there is a problem if the frequency of the carrier must be more stable than the frequency of the system clock.
The problem of generating a digital carrier synchronized to a reference frequency asynchronous with respect to the system clock arises in the design of a digital TV encoder. Digital TV has recently been introduced on a commercial scale and is becoming increasingly popular. In order to economically transmit digital video signals they are first digitized and then digitally compressed on the source side. After transmission (over the air, cable, or by satellite) they are decompressed on the receiver side inside a so-called settop decoder box. Digital compression and decompression is based on international standards like MPEG and JPEG. The output of such a decoder is digital component video data in baseband format.
In order to stay compatible with the input formats of existing television receivers and VCRs, the digital component video in baseband format needs to be converted back into an analog composite video signal. Digital TV encoders are usually used to provide this functionality. Composite video consists of baseband luminance, baseband chrominance, blanking and synchronization signals. The function of a digital encoder is to combine these four components into a single composite waveform in which the chrominance signal is modulated onto the color subcarrier frequency.
A digital TV encoder typically accepts the video data at the MPEG2 clock rate of 27 MHz±1,350 Hz. Therefore, it is desirable to design the digital TV encoder using digital logic circuits clocked at the MPEG2 rate in synchronism with the incoming data. A digital TV encoder, however, also needs to provide a mechanism of creating the color subcarrier frequency. Typically, the color subcarrier frequency is digitally synthesized. The synthesis requires a very stable and accurate clock source. The RS170-A specification, for example, states that the color subcarrier deviation should be no more than 10 Hz at a frequency of 3.579545 MHz. This relates to a deviation of 3 ppm! Typical television receivers can maintain color lock with a subcarrier frequency deviation of 20 ppm worst case. The MPEG2 clock rate of 27 MHz±1,350 Hz, however, has a deviation of 50 ppm. Such a large deviation upon the frequency of the color subcarrier could result in color shifts and complete loss of color in the typical television receiver.
There are two well known solutions to this problem. The first solution is to provide a long enough FIFO which is clocked on the input side with the incoming MPEG2 clock. Data is taken out of the FIFO at the rate of an outgoing clock that is synchronized to the color subcarrier frequency of 3.579545 MHz. This solution is acceptable so long as the average pixel rate is constant.
The second solution is to use an interpolation filter for interpolating the video data at the rate of the outgoing clock that is synchronized to the color subcarrier frequency of 3.579545 MHz. Such an interpolation filter is usually expensive, since it requires a long FIR filter structure.
In view of the above, there is a need for an improved method of synthesizing a periodic digital signal such as a color subcarrier in a digital system such as a digital TV encoder having a system clock that is asynchronous with respect to the periodic digital signal.
SUMMARY OF THE INVENTION
The present invention provides a method of synthesizing a periodic digital signal that has a series of multi-bit values at a periodic rate of a sampling clock. The periodic digital signal is synchronized to a periodic reference signal having a precise frequency. By “synchronized”, it is meant that the frequency of the periodic digital signal is substantially specified by the frequency of the reference signal. The periodic reference signal is asynchronous with respect to the sampling clock, and in particular, the sampling clock may have a frequency that is imprecise in comparison to the frequency of the periodic reference signal.
The periodic digital signal is generated by an adjustable digital oscillator clocked by the sampling clock. The frequency or phase of the periodic digital signal is compared to the frequency or phase of the periodic reference signal to produce an adjustment value for adjusting the periodic digital signal to synchronize the periodic digital signal with the periodic reference signal. The digital oscillator, for example, generates the periodic digital signal at the sampling rate by periodically incrementing an accumulator with the adjustment value. The frequency or phase of the periodic digital signal is compared to the frequency or phase of the periodic reference signal, for example, by an up/down counter that is incremented each cycle of the reference signal and is decremented each cycle of the periodic digital signal to compute the adjustment value.
The present invention provides a digital synthesizer for synthesizing a periodic digital signal that is synchronized to a periodic reference signal that is asynchronous with respect to a sampling clock of the periodic digital signal. The digital synthesizer includes an adjustable digital oscillator clocked by the sampling clock for generating the periodic digital signal. The adjustable digital oscillator has an adjustment input for adjusting the frequency of the periodic digital signal in response to an adjustment value. The digital synthesizer further includes a comparator connected to the adjustable digital oscillator for computing the adjustment value by comparing the frequency or phase of the periodic digital signal to the frequency or phase of the periodic reference signal. The digital oscillator, for example, includes an accumulator that is incremented at the sampling rate by the adjustment value. The frequency or phase comparator, for example, includes an up/down counter that is incremented or decremented each cycle of the periodic reference signal and is decremented or incremented each cycle of the periodic digital signal to compute the adjustment value.
In a preferred embodiment, a digital color subcarrier in a digital TV encoder integrated circuit chip is synthesized and synchronized to a reference frequency of a crystal oscillator that is asynchronous with respect to a digital system clock of the encoder. A digital oscillator clocked by a system clock generates a digital carrier signal, and the frequency of the digital carrier signal is adjusted by an adjustment value computed by comparing the frequency of the digital carrier signal to the reference frequency of the crystal oscillator. The s
Lutz Juergen
Malcolm, Jr. Ronald D.
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