Phase comparator and PLL circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By phase

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327 22, 327 23, H03K 5122

Patent

active

055921094

ABSTRACT:
It is an object of the present invention to provide a phase comparator which can compare phase at high speed with simple structure. The phase is compared by a precharge type NAND gate including transistors (Q35-Q37). The result of comparison in the NAND gate is then outputted only in a period in which the input clock CLKref is at "1" by the NAND gate (NA 15), and thus the phase lag of the internal clock CLKint with respect to the input clock CLKref is detected. Phase lead of the internal clock CLKint with respect to the input clock CLKref is compared with interchanged relation of clocks inputted to a phase detecting portion (PD 2). Phase comparison can be made at high speed with a simple circuit including the precharge type NAND gate and the NAND gate (NA 15).

REFERENCES:
patent: 5381085 (1995-01-01), Fischer
Electronics Selected Book, "How-To-Use PLL-IC", Masayasu Hata, et al, Chapter 10, pp. 194-197, Jun. 1987.
IEEE Journal of Solid-State Circuits, vol. SC-22, No. 2, Apr. 1987 "Design of PLL-Based Clock Generation Circuits", Deog-Kyoon Jeong, et al, pp. 255-261.

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