Phase-coherent FSK signal demodulator

Pulse or digital communications – Repeaters – Testing

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Details

375 94, 375 95, 329110, H04L 2714

Patent

active

047992395

ABSTRACT:
A system and process for receiving phase-coherent FSK signals having data and clock components which includes a plurality of subsystems and a means for carrying data among the subsystems. At least two of the subsystems are able to communicate by means of a transmitter in one of them and a receiver in the other. The receiver includes a demodulator for separating the data and clock components of the encoded phase-coherent FSK signals. The clock demodulator includes a first transition detector and a 90-degree phase shift circuit which both receive the encoded signal. A second transition detector receives the output of the phase shift or phase delay circuit. An OR gate receives the output of the first and second transition detectors to produce a four times clock signal. The data component of the phase-coherent FSK signal is recovered by either of two alternate circuits. The first circuit uses a shift register which examines at least four samples of data in conjunction with a pair of exclusive OR gates, a NOR gate, and a flip-flop. An alternate data component demodulator includes a first 90-degree phase delay circuit and an inverter both receiving the encoded data and transmitting it to a first exclusive OR gate. A second 90-degree phase delay circuit receives the output of the first exclusive OR gate. A second exclusive OR gate receives the outputs of both the second phase delay circuit and the first exclusive OR gate.

REFERENCES:
patent: 4280224 (1981-07-01), Chetnik
patent: 4324001 (1982-04-01), Rhodes
patent: 4501002 (1985-02-01), Auchterlonie
patent: 4580101 (1986-04-01), Lax
patent: 4653073 (1987-03-01), Vercellotti et al.

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