Electrical pulse counters – pulse dividers – or shift registers: c – Shift register – Particular transfer means
Patent
1994-08-12
1995-07-18
Heyman, John S.
Electrical pulse counters, pulse dividers, or shift registers: c
Shift register
Particular transfer means
377 79, 327212, G11C 1928
Patent
active
054348994
ABSTRACT:
A shift register for scanning a liquid crystal display includes cascaded stages. A given stage is formed with an input transistor switch that is responsive to an output pulse of a stage upstream in the chain of the cascaded stages. The input transistor switch charges a capacitance associated with a control electrode of a switched pull-up output transistor. The voltage in the capacitance conditions the output transistor for generating an output pulse when subsequently a clock signal occurs to the output transistor. A clamping transistor discharges the capacitance in a manner to prevent further generation of the output pulse when subsequent pulses of the clock signal occur. The clamping transistor is responsive to an output pulse of a stage downstream in the chain. An impedance that is developed at the control electrode is substantially higher after the clamping operation occurs and remain high for most of the vertical interval.
REFERENCES:
patent: 3877321 (1975-03-01), Matsue
patent: 4017741 (1977-04-01), Briggs
patent: 4951303 (1990-08-01), Larson
patent: 5055709 (1991-10-01), Smith
patent: 5055720 (1991-10-01), Tiede
patent: 5136622 (1992-08-01), Plus
patent: 5222082 (1993-06-01), Plus
Huq Ruquiya I. A.
Weisbrod Sherman
Henig Sammy S.
Heyman John S.
Laks Joseph J.
Thomson Consumer Electronics S.A.
Tripoli Joseph S.
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