Phase clock generator

Details Phase clock generator Phase clock generator

2011-05-31

2011-05-31

Donovan, Lincoln (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Clock or pulse waveform generating

C327S149000, C327S158000, C327S161000, C327S291000

Reexamination Certificate

active

07952414

ABSTRACT:
Disclosed is a phase clock generator. The phase clock generator can include transistors and a buffer. The transistors are connected between a power line and a grounding line and are provided in a form of a 4×N matrix to receive a plurality of phase-delayed signals through their gate terminals. Four transistors can form a unit column between the power line and the grounding line. From ground line to power line, the first two transistors of the unit column provide a pair of NMOS transistors, and the second two transistors provide a pair of PMOS transistors. The buffer is connected to a line, which is provided between the pair of the NMOS transistors and the pair of the PMOS transistors forming the unit column, to transmit a clock signal.

REFERENCES:
patent: 7292079 (2007-11-01), Huang et al.
patent: 7339413 (2008-03-01), Kim
patent: 2007/0030041 (2007-02-01), Huang et al.
patent: 2007/0063931 (2007-03-01), Kim
patent: 10-2007-0032446 (2007-03-01), None
patent: 10-2007-0071141 (2007-07-01), None

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