Phase changing circuit

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307601, 307603, 307605, 307595, 328155, 328 55, H03K 19086, H03K 513, H03K 5159

Patent

active

047178434

ABSTRACT:
A phase changing circuit in a logic circuit includes an ECL circuit which has a plurality of emitter output circuits. One emitter output circuit is used as the normal output. The other emitter output circuits are connected to additional capacitors. The emitter output circuits connected to the additional capacitors are also connected to an emitter output portion of separately provided control ECL circuits. An input control level of the control ECL circuit is changed to change the output level of the control ECL circuit. In accordance with whether the output level of the control ECL circuit is low or high, the additional capacitor affects or does not affect the normal output of the ECL circuit. When the capacitor affects to the normal output of the ECL circuit, the signal propagation from the input to the normal output is delayed.

REFERENCES:
patent: 4435654 (1984-03-01), Koide
IBM Tech. Disclosure Bulletin, vol. 16, No. 11, 4/1974 "Variable Delay Pulse Circuits" by Marino.
PAL System, "Variable Delay Pulse Circuits" IBM Technical Disclosure Bulletin, vol. 16, No. 11, Apr. 1974, pp. 3498-3500.
IBM Technical Disclosure Bulletin, "Continuous Integated Circuit Delay Line " vol. 21, No. 4, Sep. 1978, pp. 1582-1583.
"ECL Type Delay Circuit" English Abstract of Japanese Patent Publication 58-108824(A).
IBM Technical Disclosure Bulletin, "Encoded Variable Delay for Driver Circuits" vol. 22, No. 2, Jul. 1979, pp. 518-519.
European Search Report, Berlin, examiner: M. Arendt.

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