Phase changeable memory devices having multi-level data...

Semiconductor device manufacturing: process – Making device array and selectively interconnecting

Reexamination Certificate

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C257S209000

Reexamination Certificate

active

07037762

ABSTRACT:
A phase changeable memory device includes a lower interlayer dielectric layer on a semiconductor substrate. A plurality of first phase changeable data storage elements is disposed on the lower interlayer dielectric layer. A middle interlayer dielectric layer covers the first phase changeable data storage elements and the lower interlayer dielectric layer. A plurality of second phase changeable data storage elements is disposed on the middle interlayer dielectric layer. The first and second phase changeable data storage elements are arrayed in rows and columns such that respective first phase changeable data storage elements are disposed between respective adjacent second phase changeable data storage elements in the rows and columns. A plate electrode overlies the first and second phase changeable data storage elements and is electrically connected to the first and second phase changeable data storage elements. Related fabrication methods are also disclosed.

REFERENCES:
patent: 4545111 (1985-10-01), Johnson
patent: 5835396 (1998-11-01), Zhang
patent: 6235603 (2001-05-01), Melnick et al.
patent: 10-256508 (1998-09-01), None
patent: 2001-127263 (2001-11-01), None
patent: 10-236691 (2000-01-01), None

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