Phase change random access memory and semiconductor device

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics

Reexamination Certificate

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C257S537000, C257SE23149, C257SE21592

Reexamination Certificate

active

07964935

ABSTRACT:
A phase change random access memory comprises an under electrode; an interlayer insulating layer which is formed on the under electrode; an impurity diffusion layer which is embedded into a pore through the interlayer insulating layer; a phase change recording layer which is formed on the interlayer insulating layer; an upper electrode which is formed on the phase change recording layer; a side gate electrode which is located on an inner wall of the pore into which the impurity diffusion layer is embedded; and a side gate insulating layer which is located between the side gate electrode and the impurity diffusion layer, wherein the side gate electrode applies an electric field to the impurity diffusion layer via the side gate insulating lay, the impurity diffusion layer is depleted, and so that an effective diameter of the impurity diffusion layer can become smaller than the pore diameter.

REFERENCES:
patent: 7589364 (2009-09-01), Asano et al.
patent: 7635855 (2009-12-01), Chen et al.
patent: 2008/0001137 (2008-01-01), Kozicki et al.
patent: 2008/0173975 (2008-07-01), Chen et al.
patent: 2008/0272360 (2008-11-01), Kozicki
patent: 2003-163280 (2003-06-01), None
patent: 2006-165560 (2006-06-01), None
patent: 2007-73779 (2007-03-01), None

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