Phase change memory device having heat sinks formed under...

Active solid-state devices (e.g. – transistors – solid-state diode – Bulk effect device – Bulk effect switching in amorphous material

Reexamination Certificate

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Details

C257S003000, C257S004000, C257S005000, C257SE29002, C438S102000, C438S103000, C365S163000

Reexamination Certificate

active

08053750

ABSTRACT:
A phase change memory device includes a silicon substrate having a cell region and a peripheral region. A first insulation layer is formed in the cell region and includes a plurality of holes. Cell switching elements are formed in the holes of the first insulation layer and heat sinks are formed on the cell switching elements. The heaters are formed on the center of the heat sinks and spacers are formed on the sidewalls. A gate is formed in the peripheral region of the silicon substrate formed of a gate insulation layer, a first conductive layer, a second conductive layer, and a hard mask layer. A second insulation layer covers the entire surface of the resultant silicon substrate and exposes the spacers and the heaters and the hard mask layer. Finally, a stack pattern of a phase change layer and a top electrode is formed on the heaters.

REFERENCES:
patent: 7667219 (2010-02-01), Chang et al.
patent: 2003/0183881 (2003-10-01), Lee et al.
patent: 2007/0120106 (2007-05-01), Hayakawa et al.
patent: 2007/0120107 (2007-05-01), Hayakawa
patent: 2007-149900 (2007-06-01), None
patent: 2007-227812 (2007-09-01), None
patent: 1020080022450 (2008-03-01), None
patent: 1020080039701 (2008-05-01), None

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