Phase and frequency detector circuits

Pulse or digital communications – Spread spectrum – Direct sequence

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Details

331 1A, 331 25, 307523, H03D 324

Patent

active

047730854

ABSTRACT:
A Phase/Frequency Locked Loop comprises a controllable oscillator which is phase locked with the clock of an incoming non-return-to-zero digital data signal. The controllable oscillator may be a voltage-controlled oscillator (VCO) or may be purely digital. The circuitry includes a novel digital phase and frequency detector which detects both frequency and phase error by sampling the incoming data stream at multiple phases of the output of the VCO (or the digital equivalent thereof). One of two binary disagreement signals are produced depending on the sense of the phase error. During periods of frequency error, the circuit automatically selects the proper type of disagreement signal (the leading-edge disagreement) required to achieve frequency lock.

REFERENCES:
patent: 3714463 (1973-01-01), Laune
patent: 4015083 (1977-03-01), Bellisio
patent: 4200845 (1980-04-01), Mendenhall et al.
patent: 4594564 (1986-06-01), Yarborough, Jr.
patent: 4611230 (1986-09-01), Nienaber
patent: 4627080 (1986-12-01), Debus, Jr.

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