Phase adjustment in phase-locked loops using multiple...

Details Phase adjustment in phase-locked loops using multiple... Phase adjustment in phase-locked loops using multiple...

2007-10-19

2009-06-23

Mis, David (Department: 2817)

Oscillators

Plural oscillators

Selectively connected to common output or oscillator...

C331S00100A, C331S017000, C331S018000, C331S025000

Reexamination Certificate

active

07551039

ABSTRACT:
Phase-locked loop (PLL) logic comprises an oscillator that produces a first oscillator signal and phase detect logic that determines a phase difference between the first oscillator signal and a second oscillator signal. After the second oscillator signal is replaced by a third oscillator signal, the phase detect logic determines another phase difference between the first oscillator signal and the third oscillator signal. The PLL removes the phase difference from the another phase difference to produce an intermediate signal. The oscillator adjusts the first oscillator signal using the intermediate signal.

REFERENCES:
patent: 4879529 (1989-11-01), Schroth et al.
patent: 6731709 (2004-05-01), Doblar
patent: 6757350 (2004-06-01), Chesavage

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