Phase adjustment circuit

Multiplex communications – Wide area network – Packet switching

Patent

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Details

3701001, 370108, 375107, H04J 306

Patent

active

050519905

ABSTRACT:
A phase adjustment circuit uses a broad band circuit for processing a plurality of high speed highway data comprising m bit frames. The phase adjustment circuit provides a master frame pulse based on a frame pulse selected from respective frame pulses in the high speed highway and delayed in phase by the maximum amount and provides a master clock based on a high speed highway clock corresponding to the master frame pulse. The phase adjustment circuit receives a plurality of high speed highway data by using the master clock and the master frame pulse.

REFERENCES:
patent: 4301532 (1981-11-01), Janetzky
patent: 4426713 (1984-01-01), Shimizu et al.
patent: 4451917 (1984-05-01), De Coursey
patent: 4694472 (1987-09-01), Torok et al.
patent: 4805195 (1989-02-01), Keegan
patent: 4805196 (1989-02-01), Cooperman et al.

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