Phase adjusting circuit, system including the same and phase adj

Details Phase adjusting circuit, system including the same and phase adj Phase adjusting circuit, system including the same and phase adj

1996-10-15

1998-12-22

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Phase shift by less than period of input

327158, 327292, 327284, H03K 513, H03K 526

Patent

active

058523804

ABSTRACT:
A phase adjusting circuit includes a circuit for providing an internal clock signal in synchronization with a reference clock signal, a delay circuit for delaying the internal clock signal for a predetermined delay time and an adjusting section for adjusting a phase difference between a phase of the reference clock signal and a phase of the internal clock signal delayed for the predetermined delay time.

REFERENCES:
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patent: 5355037 (1994-10-01), Andresen et al.
patent: 5420544 (1995-05-01), Ishibashi
patent: 5552733 (1996-09-01), Lesmeister
patent: 5572557 (1996-11-01), Aoki
patent: 5578945 (1996-11-01), Flora
patent: 5646564 (1997-07-01), Erickson et al.
patent: 5663687 (1997-09-01), Kozu
patent: 5670903 (1997-09-01), Mizuno
patent: 5684421 (1997-11-01), Chapman et al.
Richard B .Watson, Jr. et al, IEEE 1992 Custom Integrated Circuits Conference, "Clock Buffer Chip with Absolute Delay Regulation Over Process and Environmental Variations" pp. 25.2.1 -25.2.5.

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