PGA package type semiconductor device having leads to be supplie

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead

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257693, H01L 2712

Patent

active

054344506

ABSTRACT:
A PGA package type semiconductor device comprises an insulating lower package, leads, an insulating upper package, conductive wires, lead pins, and at least one semiconductor chip. The leads to be supplied with a power source potential are formed on the lower package. The upper package having a semiconductor chip-mounting portion at a central portion thereof is fixed to the lower package with the leads interposed therebetween. In the upper package, the conductive wires are formed on the leads with an insulator interposed therebetween. The lead pins vertically project from a peripheral portion of the upper package, and are electrically connected to the conductive wires. At least one semiconductor chip is mounted on the chip-mounting portion of the upper package. The semiconductor chip is connected to the leads by a TAB tape, and connected to the conductive wires by a TAB tape or bonding wires.

REFERENCES:
patent: 4837184 (1989-06-01), Lin et al.
patent: 4875138 (1989-10-01), Cusack
"Development of High Density Down-Sizing PGA by Super Fine Pitch Pattern for High Speed Application", Minoru Miura et. al., The First VLSI Packaging Workshop of Japan, United States Department of Commerce National Institute of Standards and Technology and The Institute of Electrical and Electronics Engineers, Inc., pp. 67-70, Nov. 1992.

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